Senior Principal RF EM and Passive Design Engineer

Job Description

Description

Company Overview

With nearly 80,000 employees globally, Kyocera is a leading manufacturer of high-tech Ceramics which are used in a variety of industries including aerospace, automotive, medical applications, and semiconductor processing. You will find our innovative materials in everything from smartphones to space shuttles!

Look at these PERKS!

  • Competitive pay, benefits, and hours
  • 120 hours of vacation accrued per year to start (that's 3 weeks/year for regular 8-hour shifts!)
  • 10 Paid Holidays per year
  • 401(k)
  • 401(k) company match
  • Pension
  • Medical insurance
  • Dental insurance
  • Vision insurance
  • Life insurance
  • Flexible Spending Account (FSA)
  • Employee Assistance Program
  • Flexible schedules
  • Tuition reimbursement

We have a long-tenured staff (many with over 30 years of service!), a strong company mission, and an excellent benefits package that includes Medical, Dental, Vision, Life Insurance, Paid time off to Volunteer, paid Leave options, Tuition Reimbursement, and employer-paid Pension and a 401(k) with both Roth and a healthy company match. Many of our larger locations also feature onsite gyms, walking tracks, exercise rooms, and even employee gardens.

We strive to have a diverse workforce made up of people from all backgrounds, including minorities, women, and veterans, who bring their experience to support the innovation and quality that Kyocera is known for.

Kyocera International, Inc. also has a robust corporate culture and philosophy based on the experiences and writings of our founder, Dr. Kazuo Inamori, which you can learn more about here: . Our company motto is "Do the right thing as a human being," and we try to use that in our decision-making constantly.

Senior Principal RF EM & Passive Design Engineer (KREM5485)

Exempt: Yes

Pay Range: $214,096 - $348,754 (Actual base pay based on factors such as relevant experience, education, market, qualifications, and skills)

Safety Sensitive: Yes

GENERAL DESCRIPTION OF POSITION

You will be responsible for die and package level EM design, including inductors, transformers, capacitors, transmission lines, chip filters, phase shifters, couplers, etc. In addition, you will lead isolation analysis by simulating and measuring isolation between Aggressor and victim IPs and implement solutions to improve isolation including optimization of guard rings, BFMOAT/NTN, seal ring, cross-fabric extraction of parasitics between die-package, package-PCB and optimum placement of decoupling capacitors. You will be in charge of EM tool enablement and creating a flow that guarantees EM accuracy and feasibility of Cadence simulation with EM models.

ESSENTIAL DUTIES AND RESPONSIBILITIES

  • Working with RFIC design, physical design, CAD, Process, package and PCB teams
  • Extract models for EM components for seamless integration into Cadence simulations
  • Analyze and optimize isolation between victim and aggressors, on die, package, PCB
  • Enable and maintain 2D/3D EM tools based on die process, package/PCB stackup
  • Run initial Cadence simulations to validate EM models and troubleshoot simulation challenges and convergence issues
  • Perform any other related duties as required or assigned.

QUALIFICATIONS

  • MS or PhD in Electrical Engineering with special emphasis in electromagnetics and circuit design, with at least 15+ years of experience in IC design industry, particularly mmWave RFIC
  • Demonstrates deep knowledge of electromagnetic theory, microwave engineering and antenna engineering
  • Proficiency with EM passive designs and familiarity with 2D/3D EM simulation tools like HFSS PeakView, EMX, Momentum, Helic and Clarity. Ability to recommend one tool vs. the other depending on the use case, e.g., isolation, parasitic extraction, package extraction, simulation convergence, accuracy, etc
  • Familiar with S parameter measurement in the lab and on-wafer measurements. Experience with using VNA, spectrum analyzer, TDR, and etc
  • Knows how to mitigate and compensate package bump transition effects
  • Solid understanding of the impact of die seal ring on isolation and how to mitigate potential issues due to seal ring
  • Familiarity with package design, RFIC design and Cadence Virtuoso simulation flow. Ability to troubleshoot convergence issues in Spectre simulation when N-port models are used together with active devices.
  • Familiar with the flow of package and PCB design and layout tools
  • Experience in advanced transceiver design and integration
  • Familiar with RF specs such as NF, IP3, emission, isolation, ...
  • Able to model die and package EM interaction (including underfill)
  • Able to decide on how to model VDD and GND die bumps to capture isolation and coupling between different parts of the circuit.

PHYSICAL ACTIVITIES

The following physical activities described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions and expectations.

While performing the functions of this job, the employee is regularly required to sit, talk or hear; frequently required to walk; and occasionally required to stand, use hands to finger, handle, or feel, reach with hands and arms.

The employee must occasionally lift and/or move up to 25 pounds, frequently lift and/or move up to 10 pounds. Specific vision abilities required by this job include close vision.

ENVIRONMENTAL CONDITIONS

The following work environment characteristics described here are representative of those an employee encounters while performing essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions.

While performing the functions of this job, the employee is occasionally exposed to work near moving mechanical parts.

The noise level in the work environment is usually quiet.

ADDITIONAL INFORMATION

The above statements are intended to describe the work being performed by people assigned to this job. They are not intended to be an exhaustive list of all responsibilities, duties and skills required. The duties and responsibilities of this position are subject to change and other duties may be assigned or removed at any time. This position may require exposure to information subject to US Export Control regulations, i.e.: the International Traffic and Arms Regulations (ITAR) or Export Administration Regulations (EAR). All applicants must be US persons within the meaning of US regulations.

Kyocera International, Inc. values diversity in its workforce, and is proud to be an AAP/EEO employer. All qualified applicants will receive consideration for employment without regard to race, sex, color, religion, sexual orientation, gender identity, national origin, protected veteran status, or on the basis of disability.

If you are an individual with a disability and require a reasonable accommodation to complete any part of the application process, or are limited in the ability or unable to access or use this online application process and need an alternative method for applying, you may contact Kyocera International, Inc. Human Resources team directly.
Reasonable accommodations may be made to enable individuals with disabilities to perform essential functions.





 

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